This invention relates to electronic interface mechanisms and electronic switching mechanisms for enabling two or more digital computers or digital data processors to communicate with one another.
As may be seen from the above-cited references, various mechanisms and systems have been heretofore proposed for enabling one data processor to communicate with another data processor. A mechanism currently marketed by International Business Machines Corporation of Armonk, N.Y. (herein referred to as "IBM") for accomplishing this purpose is called a "channel-to-channel adapter" and is described in References (1)-(3). This adapter is connected to the input/output (I/O) interface cables associated with two different data processor input/output channels for enabling data transfer operations to take place between these two channels. Normally, the adapter is used to connect channels associated with two different data processors, thus establishing a loosely coupled multiprocessing system. To each of the channels to which the adapter is connected, the adapter appears to be an I/O device control unit and the adapter is selected and responds in the same manner as an I/O device control unit.
While the currently marketed IBM channel-to-channel adapter performs its intended purpose in a satisfactory manner, there is nevertheless room for further improvements. For one thing, there is room for increasing the efficiency of the processor-to-processor data transfer operations. For another thing, there is room for reducing the processor software overhead required for the data transfer operations. For a further thing, there is room for reducing the amount of channel busy time caused by the adapter. And with respect to a newly emerging class of processor applications commonly referred to decentralized or distributed data processing systems, there is a need for providing a channel-to-channel adapter capable of enabling communications between more than two data processors.
Other more or less representative and heretofore proposed mechanisms and systems for interconnecting two or more data processors are described in References (4)-(9). These proposed mechanisms and systems have various limitations which are not always desirable. Some are relatively slow, some are relatively complex and expensive and some are of a relatively specialized nature which is not compatible for use with many of the data processors currently in use, at least not without the use of further special adapters for coupling the data processors to the interface or switching mechanism.
A further class of somewhat related items is represented by References (10)-(13). These references describe various crosspoint type switching mechanisms for enabling a plurality of data processor I/O channels to be switched between different ones of a plurality of I/O control units or I/O devices or, as represented by Reference (10), for enabling a plurality of control units to be switched between different ones of a plurality of input/output devices. While some aspects of these mechanisms may be used in connection with the present invention, these references do not directly concern themselves with the problems involved in establishing data transfer interconnections between two or more data processors.
A further class of systems which are used for enabling different data processors to communicate with one another are known as "teleprocessing systems". These systems use communication facilities, such as telephone lines and radio links, for providing the connections between the different computers or data processors. These systems employ relatively complex transmission control units and communications controllers for interfacing with the particular communications network being used. Also, an appreciable amount of access method software is required in each data processor which is to be connected to the system. As a consequence, these teleprocessing systems are too slow and too expensive for present purposes. By way of contrast, what is contemplated by the present invention is a relatively inexpensive channel-to-channel adapter unit which may be directly connected to two or more data processors by way of their normal I/O interface cables for enabling high speed communications between such processors.